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this is information on a product in full production. october 2015 docid028541 rev 1 1/15 rhflvds315 rad-hard quad lvds driver datasheet - production data features ? lvds output ? cmos input ? enable/disable function with high-impedance ? ansi tia/eia-644 compliant ? 400 mbps (200 mhz) ? cold spare on all pins ? 3.3 v operating power supply ? 4.8 v absolute rating ? output voltage: 350 mv on 100 ? load ? hermetic package ? guaranteed up to 300 krad tid ? sel immune up to 135 mev.cm2/mg ? set/seu immune up to 67 mev.cm2/mg description the rhflvds315 is a quad, low-voltage, differential signaling (lvd s) driver specifically designed, packaged, and qualified for use in aerospace environments in a low-power and fast point-to-point baseband data transmission standard. operating at 3.3 v power supply, the rhflvds315 operates over a controlled impedance of 100-ohm transmission media that may be printed circuit board traces, back planes or cables. the circuit features an intern al fail-safe function to ensure a known state in case of floating input. all pins have cold spare buffers to ensure they are in high impedance when v cc is tied to gnd. designed using st's proprietary cmos process with specific mitigation techniques, the rhflvds315 achieves ? best in the class ? for hardness to total ionisation dose and heavy ions. the rhflvds315 can operate over a large temperature range of -55 c to +125 c and is housed in a hermetic ceramic flat-16 package. ceramic flat-16 the upper metallic lid is electrically connected to ground table 1. device summary reference smd pin quality level package lead finish mass eppl (1) 1. eppl = esa preferred part list temp. range RHFLVDS315K1 - engineering model ceramic flat-16 gold - - -55 c to 125 c rhflvds315k01v 5962f98651 qml-v flight target www.st.com
contents rhflvds315 2/15 docid028541 rev 1 contents 1 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 maximum ratings and operati ng conditions . . . . . . . . . . . . . . . . . . . . . . 5 4 radiation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6 test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 7 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7.1 ceramic flat-16 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 8 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 9 shipping information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 10 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
docid028541 rev 1 3/15 rhflvds315 functional description 15 1 functional description figure 1. logic diag ram and logic symbol note: 1 the g input features an internal pull-up network. the g input features an internal pull-down network. if they are floating the circuit is enabled. 2 l = low level, h = high level, x = irrelevant, z = high impedance (off) table 2. truth table input enables outputs agg yz hhxhl lhxlh hxlhl lxllh xlhzz open h x l h open x l l h &6 $ $ $ $ < = < = < = < = * * $ $ $ $ < = < = < = < = * * %.
pin configuration rhflvds315 4/15 docid028541 rev 1 2 pin configuration figure 2. pin connections (top view) table 3. pin description pin number symbol name and function 1, 7, 9, 15 1a to 4a driver inputs 2, 6, 10, 14 1y to 4y driver outputs 3, 5, 11, 13 1z to 4z 4g enable 12 g 8 gnd ground 16 v cc supply voltage
docid028541 rev 1 5/15 rhflvds315 maximum ratings and operating conditions 15 3 maximum ratings and operating conditions absolute maximum ratings are those values be yond which damage to the device may occur. functional operation under these conditions is not implied. table 4. absolute maximum ratings symbol parameter value unit v cc supply voltage (1) 1. all voltages, except differential i/o bus voltage, are with respect to the network ground terminal. 4.8 v v i ttl inputs (operating or cold spare) -0.3 to 4.8 v out lvds outputs (operating or cold spare) -0.3 v to +4.8 v t stg storage temperature range -65 to +150 c t j maximum junction temperature +150 r thjc thermal resistance junction to case (2) 2. short-circuits can cause excessive heating. destructive dissipation can result from short-circuits on the amplifiers. 22 c/w esd hbm: human body model ? all pins except lvds outputs ? lvds outputs vs. gnd 2 8 kv cdm: charge device model 500 v table 5. operating conditions symbol parameter min. typ. max. unit v cc supply voltage 3 3.3 3.6 v v in driver dc input voltage (ttl inputs) 0 3.6 t a ambient temperature range -55 +125 c
radiation rhflvds315 6/15 docid028541 rev 1 4 radiation total dose (mil-std-883 tm 1019) the products guaranteed in radiation within the rha qml-v system fully comply with the mil-std-883 tm 1019 specification. the rhflvds315 is rha qml-v, tested and characterized in full compliance with the ? mil-std-883 specification, between 50 and 300 rad/s only (full cmos technology). all parameters provided in table 7: electrical characteristics apply to both pre- and post- irradiation, as follows: ? all test are performed in accordance with mil-prf-38535 and test method 1019 of mil-std-883 for total ionizing dose (tid). ? the initial characterization is performed in qualification only on both biased and unbiased parts. ? each wafer lot is tested at high dose rate only, in the worst bias case condition, based on the results obtained duri ng the initial qualification. heavy ions the behavior of the product when submitted to heavy ions is not tested in production. heavy-ion trials are performe d on qualification lots only. table 6. radiation type characteristics value unit tid high-dose rate (50 - 300 rad/sec) up to: 300 krad heavy ions sel immune up to: ? (with a particle angle of 60 at 125 c) 135 mev.cm2/mg sel immune up to: ? (with a particle angle of 0 at 125 c) 67 set/seu immune up to: ? (at 25 c) 67
docid028541 rev 1 7/15 rhflvds315 electrical characteristics 15 5 electrical characteristics in table 7 below, v cc = 3 v to 3.6 v, capa-load (cl) = 10 pf, typical values are at ? t amb = +25 c, min. and max values are at t amb = - 55 c and + 125 c unless otherwise specified table 7. electrical characteristics symbol parameter test cond itions min. typ. max. unit i ccl total enabled supply current, drivers enabled, not switching v in = 0 v or v cc ? load = 100 ? on all channels 16.5 35 ma i ccz total disabled supply current, loaded or not loaded, ? drivers disabled v in = 0 v or v cc g = gnd, g = v cc 2.8 4 i off (1) ttl input power-off leakage current v cc = 0 v, v in = 3.6 v -10 10 a lvds output power-off leakage current v cc = 0 v, v out = 3.6 v -50 +50 v oh output voltage high r l = 100 ? 1.65 v v ol output voltage low 0.925 v od1 differential output voltage 250 400 mv dv od1 change of magnitude of v od1 for complementary output states 10 v os offset voltage 1.125 1.45 v dv os change of magnitude of v os for complementary output states 15 mv i os output short-circuit current v in = 0 v and v o(z) = 0 v or ? v in = v cc and v o(y) = 0 v -9 ma i o high impedance output current disabled, v out = 3.6 v or gnd -10 10 a v ih input voltage high g, g , and ttl inputs 2v cc v v il input voltage low gnd 0.8 i ih high level input current g, g , and ttl inputs ? v cc = 3.6 v, v in = v cc -10 10 a i il low level input current g, g and ttl inputs ? v cc = 3.6 v, v in = 0 -10 10 c in input capacitance 3 pf t phld propagation delay time, high to low output refer to figure 4 0.3 3.5 ns t plhd propagation delay time, low to high output 0.3 3.5
electrical characteristics rhflvds315 8/15 docid028541 rev 1 cold sparing the rhflvds315 features a cold spare input and output buffer. in high reliability applications, cold sparing enables a redundant device to be tied to the data bus with its power supply at 0 v (v cc = gnd) without affecting the bus signals or injecting current from the i/os to the power supplies. cold sparing also allows redundant devices to be kept powered off so that they can be switched on only when required. this has no impact on the application. cold sparing is achieved by im plementing a high impedance between the i/os and v cc . esd protection is ensured through a non-conventional dedicated structure. fail-safe in many applications, inputs need a fail-safe function to avoid an uncertain output state when the inputs are not connected properly. in case of ttl floating inputs, the lvds outputs remain in a stable logic-high state. t sk1 channel-to-channel skew (2) load: refer to figure 4 0.6 ns t sk2 chip-to-chip skew (3)(4) 3 t skd differential skew (5) ? (t phld -t plhd ) 0.6 t phz propagation delay time, high level to high impedance output 12 t plz propagation delay time, low level to high impedance output 12 t pzh propagation delay time, high impedance to high level output 12 t pzl propagation delay time, high impedance to low level output 12 1. all pins except pin under test and v cc are floating. 2. t sk1 is the maximum delay time differenc e between all outputs of the same devic e (measured with all inputs connected together). 3. t sk2 is the maximum delay time difference between outputs of al l devices when they operate wi th the same supply voltage, at the same temperature. 4. guaranteed by design. 5. t skd is the maximum delay ti me difference between t phld and t plhd ( see figure 4 ). table 7. electrical char acteristics (continued) symbol parameter test cond itions min. typ. max. unit
docid028541 rev 1 9/15 rhflvds315 test circuit 15 6 test circuit figure 3. voltage and current definition figure 4. test circuit, timing and voltage definitions for differential output signal 1. all input pulses are supplied by a generator with the following characteristics: t r or t f 1 ns, f = 1 mhz, ? z o = 50 ? , and duty cycle = 50%. 2. the product is guaranteed in test with cl = 10 pf v od lvds driver (y) out+ (z) out- v oz v oy v os =(v oz +v oy )/2 v in i i cl=10pf 100ohm lvds driver cl=10pf v in t phld t plhd tf v od tr 80% 20% 80% 20% vcc/2 vcc/2
test circuit rhflvds315 10/15 docid028541 rev 1 figure 5. enable and disable waveform 1. all input pulses are supplied by a generator with the following characteristics: t r or t f 1 ns, ? f g or f g = 500 khz, and pulse width g or g = 500 ns. 2. the product is guaranteed in test with cl = 10 pf v od cl=10pf 50ohm lvds driver cl=10pf out+ out- 50ohm 1.2v v os g t pzh 50% 50% t pzl 50% 50% t phz t plz 50% 50% v out+ or v out- 50% 50% g v out+ or v out-
docid028541 rev 1 11/15 rhflvds315 package information 15 7 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions a nd product status are available at: www.st.com . ecopack ? is an st trademark.
package information rhflvds315 12/15 docid028541 rev 1 7.1 ceramic flat-16 p ackage information figure 6. ceramic flat-16 pa ckage mechanical drawing 1. the upper metallic lid is elec trically connected to ground. table 8. ceramic flat-16 package mechanical data ref. dimensions millimeters inches min. typ. max. min. typ. max. a 2.31 2.72 0.091 0.107 b 0.38 0.48 0.015 0.019 c 0.10 0.18 0.004 0.007 d 9.75 10.13 0.384 0.399 e 6.75 7.06 0.266 0.278 e2 4.32 0.170 e3 0.76 0.030 e 1.27 0.050 l 6.35 7.36 0.250 0.290 q 0.66 1.14 0.026 0.045 s1 0.13 0.005 h e f / ( ' 6 4 $ ( ( / ( &v
docid028541 rev 1 13/15 rhflvds315 ordering information 15 8 ordering information note: contact your st sales office for information regarding the specific conditions for products in die form and qml-q versions. 9 shipping information date code the date code is structured as follows: ? engineering model: em xyywwz ? qml flight model: fm yywwz where: x = 3 (em only), assembly location rennes (france) yy = last two digits of the year ww = week digits z = lot index of the week table 9. order codes order code description temp. range package marking (1) 1. specific marking only. complete marking includes the following: ? - smd pin (on qml-v flight only) ? - st logo ? - date code (date the package was sealed) in yywwa (year, week, and lot index of week) ? - qml logo (q or v) ? - country of origin (fr = france). packing RHFLVDS315K1 engineering model -55 c to 125 c ceramic flat-16 RHFLVDS315K1 strip pack rhflvds315k01v qml-v flight tbd
revision history rhflvds315 14/15 docid028541 rev 1 10 revision history table 10. document revision history date revision changes 21-oct-2015 1 initial release
docid028541 rev 1 15/15 rhflvds315 15 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics ? all rights reserved

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